HIGH-LEVEL DESIGN  | PRODUCTS

		The two "wildly different" reasons we bought Arithmatica Author: Brett Cline, Forte Design Systems This paper discusses Forte's acquisition of Arithmatica, datapath optimization and how RTL and ESL designers can benefit from it. Published: April 2010 Download now (PDF).
		Abstraction and Control-Dominated Hardware Designs Author: John Sanguinetti, Forte Design Systems This article discusses value that design abstraction offers for control-dominated designs. Published: February 6, 2009 by EDA DesignLine. View now (HTML).
		ESL Synthesis: Silver Bullet or Power Tool? Author: John Sanguinetti, Forte Design Systems This paper discusses the role of ESL Synthesis in future hardware design methodologies. Published: February 2007 in the Frontier Journal. Download now (PDF).
		Behavioral IP Reuse Methodology Author: Sean Dart, Forte Design Systems This paper discusses a reuse methodology that is both practical and real and that uses behavioral synthesis as its driving technology. It demonstrates two different reuse scenarios using a concrete example and real logic synthesis results. Published: December 2005 in the EDA Tech Forum Journal. View now (HTML).
		Metrics-based Behavioral Design: A Methodology for Quickly Realizing High Quality Hardware for Signal Processing Applications Author: David Pursley, Forte Design Systems This paper discusses a metrics-based behavioral design methodology that allows designers to create hardware (ASIC, FPGA or SoC) from an implementation-independent C/C++ algorithm. Published and presented: October 26, 2005 at GSPx. Download now (PDF).
		Implementation Independent Design of a Digital Imaging Algorithm Using Behavioral Synthesis Author: David Pursley, Forte Design Systems This paper discusses a behavioral design methodology that allows designers to create hardware (ASIC, FPGA or SoC) from an arbitrary implementation independent C/C++ algorithm. Published and presented: March 8, 2005 at the Embedded Systems San Francisco Conference. Download now (PDF).
		Using Behavioral Clustering to Improve Quality of Results for DSP Designs Author: David Pursley, Forte Design Systems This paper introduces behavioral clustering, a technique that significantly improves performance, area, and power consumption of digital signal processing (DSP) designs. Published and presented: September 27, 2004 at GSPx. Download now (PDF).
		A Look Inside Behavioral Synthesis Author: Michael Meredith, Forte Design Systems This article answers the questions "What is behavioral synthesis?" and "How does a behavioral synthesis process work?" Published: April 8, 2004 by EEDesign. View now (HTML).
		Doing Behavioral Design the Right Way Minimizes Verification Author: Kirk Ober, Forte Design Systems This paper addresses ways to write your behavioral specification to achieve a more unified verification scheme with the goal of using a single testbench before and after behavioral synthesis for all architectures. Published and presented: March 3, 2004 at DVCon. Download now (PDF).
		A Practical Approach to Hardware and Software SoC Tradeoffs Using High-level Synthesis for Architectural Exploration Authors: David Pursley and Brett Cline, Forte Design Systems This paper presents a methodology that offers system designers options to make better partitioning decisions by using synthesis-based metrics. Published and presented: ISPC and GSPx 2003, April 2003. Download now (PDF).
		High-level Modeling and Hardware Implementation with General Purpose Languages and High-level Synthesis Authors: John Sanguinetti and David Pursley, Forte Design Systems This paper addresses the gap between high-level hardware modeling and implementing a top-down design methodology. Published and presented: Ninth IEEE/DATC Electronic Design Processes Workshop, April 2002. Download now (PDF).